Energieffektiv design av ett inbyggt flashminneshanteringssystem
The report is the result of a master thesis at ENEA AB during the fall of 2009. Itaims to create a specification of flash memory management system which focuseson power efficiency and low RAM usage for embedded systems, and to design andimplement a prototype of such a system to facilitate further development toward thecreated specification. The system used by ENEA today is a Flash Translation Layer(FTL). It has a complex structure which prohibits modifications and customization,therefore a new flash memory management system needs to be developed.The suggested solution uses a translation layer called Metadata FTL (MFTL), wherefile system metadata and userdata are separated from each other in order to improveperformance. The partition holding userdata uses a block-level mapped translationlayer system called Fully Associative Sector Translation FTL. The other partition,holding metadata, will instead use a page-level mapped translation layer systemwhich also separates often modified data from data modified seldom. The separationof data with different update frequencies is executed by a page allocation schemecalled Modification Aware (MODA).The result of this report is a specification of the system described in the sectionabove and an implemented prototype which has all the basic features of an FTL.The implemented design can successfully be used instead of the old FTL with a fewrestrictions. It can handle normal file system commands and can manage rebootswithout loss of information. However, the main goal of the implemented designis still to act as a prototype to facilitate further development toward the designexplained in the specification.