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78 Uppsatser om Pre-processor - Sida 1 av 6

Utveckling av projektlaborationför signalbehandling : med digital signalprocessor programmeradmed LabVIEW och Matlab

This report describes how to process audio signals in real time with a digital signalprocessor. The digital signal processor used in the thesis and described in the reportare the Blackfin processor ADSP-BF537 from Analog Devices.In the body of this report there is theory of the processor characteristics and thevarious programming languages used. All experiments that were made on theprocessor are described, these descriptions also help in understanding the annexeswhere the experiments will be presented. The body of this report also describes theprogram used to do experiments. Testing the CPU limit was done and the results arepresented to get a good view of what it can handle.

Portning och utökning av processor för ASIC och FPGA

In this master thesis, the possibilities of customizing a low-cost microprocessor with the purpose of replacing an existing microprocessor solution are investigated. A brief survey of suitable processors is carried out wherein a replacement is chosen. The replacement processor is then analyzed and extended with accelerators in order to match set requirements.The result is a port of the processor Lattice Mico32 for the FPGA curcuit Xilinx Virtex-5 which replaces an earlier solution using Xilinx MicroBlaze. To reach the set requirements, accelerators for floating point arithmetics and FIR filtering have been developed. The toolchain for the processor has been modified to support the addition of accelerated floating point arithmetics.A final evaluation of the presented solution shows that it fulfills the set requirements and constitutes a functional replacement for the previous solution..

Exekveringsmiljö för Plex-C på JVM

The Ericsson AXE-based systems are programmed using an internally developed language called Plex-C. Plex-C is normally compiled to execute on an Ericsson internal processor architecture. A transition to standard processors is currently in progress. This makes it interesting to examine if Plex-C can be compiled to execute on the JVM, which would make it processor independent. The purpose of the thesis is to examine if parts of the run-time environment of Plex-C can be translated to Java and if this can be done so that sufficient performance is obtained.

Portning till ARM Cortex M3 och prestandajämförelse

The Anybus CompactCom modules are today using the Anybus NP30 processor. These modules are used for communication between industrial machines and larger network protocols. The communication loads on these systems are increasing every day and the limiting factor for the system is the processor.HMS, the company that develops the Anybus CompactCom, has shown interest for a benchmark test between the old processor and a new processor, ARM Cortex-M3. This project includes that benchmark. To be able to get results that reflect reality a test environment was created to simulate Anybus CompactCom conditions.

UTVECKLING AV PROCESSORPLATTFORM

Abstract The purpose of this project is to develop a modular processor card which is intended to work as a platform for Kitron Development Karlskoga. The modular processor card is meant to be used as a control system in development projects, mainly in medical and industrial products. The processor card will consist of a central unit with the basic functions for a control system. Furthermore there will be complete modules with machine commodity and programming, to pick exactly the necessary functions for a specific application. With consideration to the specification of the development and the main unit, I chose an adequate microprocessor (AT90CAN32) as core and interface circuits to stated border areas. The construction is first completed in the program MultiSim and then remade in the program OrCAD Capture. The programming language C was used in the software model.

Konstruktion av radiokontrollerad klocka

Uppgiften var att ta emot och avkoda en radiosignal för tidsangivelse, DCF77. Avkodaren implementerades i en FPGA-krets från ALTERA. Utvecklingen genomfördes i Quartus II-miljön med språket VHDL samt en alternativ lösning där mjuk processor användes. Både utvecklingsmiljön och språken var väl lämpade för uppgiften. Ett genomgående problem var dock radiomottagaren ofta levererade för svag signal för att kunna avkodas korrekt.

Integrering av DSP i talförstärkaren MMT-4

Att ansluta en digital signalprocessor kräver ett omfattande arbete. Innehållet i denna rapport sammanfattar teoretiska metoder för att integrera den digitala signalprocessorn ADAU1701 i talförstärkaren MMT-4, utvecklad av företaget Xena Medical. Arbetet har till största delen bestått i att finna en lämplig DSP och studera dess datamanual för att anpassa den till talförstärkaren.Mycket av rapporten sammanfattar beräkningar av komponentvärden och anpassning av ADAU1701 för MMT-4:s behov. ADAU1701 beskrivs utifrån det så kallade selfboot-läget där processorn kan arbeta som fristående processor..

Processchemaläggare för mångkärniga processorer ? Fördelning av minnesbelastning i NUMA-system

For systems with multicore processors contention for shared resources is a problem that occurs when several memory-intensive processes are executed in parallel within the same memory domain. This contention has a direct influence on the performance of the system and is a complex problem that has been recognized for a long time. An attractive and actively studied way to minimize this problem is by using a process scheduler adapted to allocate processor cores in a way such that contention for shared resources is minimized.With the introduction of multicore NUMA-systems (Non-Uniform Memory Access) the situation has become even more complex. In these systems the access time for processor cores to different memory domains vary depending on factors such as distance and load. Thus, the process scheduler also has to consider where the memory of each process is placed to minimize the distance and balance the load on each memory domain.This report presents a user-level process scheduler for a NUMA-system based on the multicore processor Tilera TILEPro64.

Kombinerad DSP- och FPGA-lösning för en bildbehandlingsapplikation

This Master's Thesis describes the design of a new system where a digital signal processor has been added to an existing imaging system consisting of field programmable gate arrays. The new system will offer a higher degree of flexibility by considerably shortening the design time and make it possible to implement more complex algorithms than the existing ones. The choice of system architecture and a test implementation are discussed. The test implementation consists of a program for the digital signal processor and VHDL code for one of the field programmable gate arrays. The code for the digital signal processor was designed for testing on an evaluation board from Texas Instruments.

Utvärdering av grafisk utvecklingsmiljö för programmering av signalprocessor

This work aims to evaluate the possibility of using a graphical programming language to develop software for a digital signal processor. A fixed-point digital signal processor called Blackfin BF-537 is used for this. Instead of using conventional programming languages, like C or assembler, for software development the possibilities to use a graphical environment to fill the same purpose are examined. The development environment primarily used is NI LabVIEW, but also the use of Mathworks Matlab Simulink is investigated. A variety of programs consisting of various signal processing operations and utilities are developed using these development environments.

Liten displaymodul

The purpose of this Master Thesis is to analyze what suitable hardware platforms there are on the market in order to build a low price control and information system for mobile applications, called small display module. The thesis will be underlying material for making a decision for further development. The result of the thesis consists mainly of a Windows CE kernel and a schematic for a CPU card, on which it would be suitable to build the display module. Another major part of the report is the introduction of different techniques that could be of interest when designing a processor based system. The processor architecture that was chosen is the x86.

Utveckling av produktprototyp för hårdvaruaccelererad bildbehandling

I dagens samhälle finns inbyggda system i allt från vattenkokare till rymdraketer. För att möta användarnas ständigt ökande krav på prestanda och funktionalitet måste hårdvaran i dessa system utnyttjas optimalt. Detta kan göras genom att konstruera hårdvara specifikt för den aktuella uppgiften eller att använda en mer generell hårdvara, där istället mjukvaran är anpassningsbar. I många fall kan det vara lämpligt, och i vissa fall även nödvändigt, att blanda dessa metoder för att lösa en given uppgift. En kraftfull processor kan exempelvis kompletteras med en accelerator uppbyggd av specifik hårdvara.

Reducering av effektförbrukning i inbyggda system med Linux

Linux is a growing operating system in embedded systems. Today, Linux is not only in heavy servers but also in cell phones, PDAs, cameras and other devices running on battery power. While current technology is more energy efficient, more and more technologies are implemented into a single unit resulting in an overall increase of power consumption.Low power consumption is an increasingly important feature of a system today. Lower power consumption means lower costs, less environmental impact, and longer life for applications that runs on batteries.This work compiles methods to reduce power consumption of Linux systems. The work includes examining whether the available opportunities are platform-specific or of a more general nature.

Deterministisk Komprimering/Dekomprimering av Testvektorer med Hjälp av en Inbyggd Processor och Faxkodning

Modern semiconductor design methods makes it possible to design increasingly complex system-on-a-chips (SOCs). Testing such SOCs becomes highly expensive due to the rapidly increasing test data volumes with longer test times as a result. Several approaches exist to compress the test stimuli and where hardware is added for decompression. This master?s thesis presents a test data compression method based on a modified facsimile code.

Beräkningar med GPU vs CPU : En jämförelsestudie av beräkningseffektivitet med avseende på energi- och tidsförbrukning

Examensarbetet handlar om en jämförelsestudie av beräkningseffektivitet med avseende på energi- och tidsförbrukning mellan grafikkort och processorer i persondatorer och PlayStation 3.Problemet studeras för att göra allmänheten uppmärksam på att det går att lösa en del av energiproblematiken med beräkningar genom att öka energieffektiviteten av beräkningsenheterna.Undersökningen har genomförts på ett explorativt sätt och studerar förhållandet mellan processorer, grafikkort och vilken som presterar bäst i vilket sammanhang. Prestandatest genomförs med molekylberäkningsprogrammet F@H och med filkomprimeringsprogrammet WinRAR. Testerna utförs på MultiCore- och SingleCorePCs och PS3s av olika karaktär. I vissa test mäts effektförbrukning för att kunna räkna ut hur energieffektiva vissa system är.Resultatet visar tydligt hur den genomsnittliga effektförbrukningen och energieffektiviteten för olika testsystem skiljer sig vid belastning, viloläge och olika typer beräkningar..

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