Wheat yield depends on the number of ears per m2, the number of kernels per ear and the kernel weight. By knowing the ability of different cultivars to compensate for the different yield components and knowing which yield component that is the most important for the final yield, the farmer can match the cultivar and management to the location. The objective of the study was to investigate how the yield components of winter wheat vary depending on genotype, environment, sowing density and date of sowing.Seven varieties were grown in four locations in Sweden with three different sowing densities and with an early and a late sowing date. On each experimental site, the surviving plants after winter were counted, as well as the number of shoots at early and late spring and the number of ears. Ten ears from each site were cut at three different occasions, starting from the time of blooming, with 200 day degrees between each cut.

This work aims to evaluate the possibility of using a graphical programming language to develop software for a digital signal processor. A fixed-point digital signal processor called Blackfin BF-537 is used for this. Instead of using conventional programming languages, like C or assembler, for software development the possibilities to use a graphical environment to fill the same purpose are examined. The development environment primarily used is NI LabVIEW, but also the use of Mathworks Matlab Simulink is investigated. A variety of programs consisting of various signal processing operations and utilities are developed using these development environments.

I dagens samhälle finns inbyggda system i allt från vattenkokare till rymdraketer. För att möta användarnas ständigt ökande krav på prestanda och funktionalitet måste hårdvaran i dessa system utnyttjas optimalt. Detta kan göras genom att konstruera hårdvara specifikt för den aktuella uppgiften eller att använda en mer generell hårdvara, där istället mjukvaran är anpassningsbar. I många fall kan det vara lämpligt, och i vissa fall även nödvändigt, att blanda dessa metoder för att lösa en given uppgift. En kraftfull processor kan exempelvis kompletteras med en accelerator uppbyggd av specifik hårdvara.

The quality of bread wheat is a large subject to study. The quality rests on two legs. The first one is the inheritance of specific characters, which can be influenced through plant breeding and type of cultivar. The other one is the environmental influences, such as crop rotation, nutrition, harvest and storage. The latter factors are possibly to affect through cultivation practices, while other factors are not possible to influence on for the grower, such as seasonal changes of weather and the soil content.

Modern semiconductor design methods makes it possible to design increasingly complex system-on-a-chips (SOCs). Testing such SOCs becomes highly expensive due to the rapidly increasing test data volumes with longer test times as a result. Several approaches exist to compress the test stimuli and where hardware is added for decompression. This master?s thesis presents a test data compression method based on a modified facsimile code.

Examensarbetet handlar om en jämförelsestudie av beräkningseffektivitet med avseende på energi- och tidsförbrukning mellan grafikkort och processorer i persondatorer och PlayStation 3.Problemet studeras för att göra allmänheten uppmärksam på att det går att lösa en del av energiproblematiken med beräkningar genom att öka energieffektiviteten av beräkningsenheterna.Undersökningen har genomförts på ett explorativt sätt och studerar förhållandet mellan processorer, grafikkort och vilken som presterar bäst i vilket sammanhang. Prestandatest genomförs med molekylberäkningsprogrammet F@H och med filkomprimeringsprogrammet WinRAR. Testerna utförs på MultiCore- och SingleCorePCs och PS3s av olika karaktär. I vissa test mäts effektförbrukning för att kunna räkna ut hur energieffektiva vissa system är.Resultatet visar tydligt hur den genomsnittliga effektförbrukningen och energieffektiviteten för olika testsystem skiljer sig vid belastning, viloläge och olika typer beräkningar..

I dagsläget används VPN allt mer bland företagen för att ansluta till olika nätverk. Detta kan medföra att routingtabellen blir alltför stor och det kan i sin tur påverka processorbelastningen på routern som delar ut alla VPN.Detta arbete hade som syfte att granska om det är några märkbara prestandaskillnader på en routers processor när olika routingprotokoll används tillsammans med VRF. Protokollen som detta arbete tog upp var BGP, OSPF och RIP.Tre olika nätverks-scenarier skapades där olika tester genomfördes för de tre nämnda routingprotokollen. Det gjordes även tester på routrar när ingen VRF användes för att jämföra resultaten. Testerna bestod av att granska processorbelastningen på routrar när det fanns många rutter i nätverket och när nätverket var belastat med trafik.Testernas visade att skillnaden mellan BGP och OSPF inte är särskilt stor, men när RIP användes så steg processorbelastningen markant när nätverket hade många rutter.

This master?s thesis examines the possibility to heuristically optimise instruction cache performance in a Just-In-Time (JIT) compiler. Programs that do not fit inside the cache all at once may suffer from cache misses as a result of frequently executed code segments competing for the same cache lines. A new heuristic algorithm LHCPA was created to place frequently executed code segments to avoid cache conflicts between them, reducing the overall cache misses and reducing the performance bottlenecks. Set-associative caches are taken into consideration and not only direct mapped caches.

This report deals with RFID systems and how to detect nearby tags with the Mifare standard using only a microcontroller and an antenna circuit.The aim was to investigate whether there was any possibility to continuously search for a nearby tag for a system operated with batteries without compromising   the lifespan of the battery. At this time the system would take too long time to wake up and look for a tag to give a satisfactory battery lifespan, which should be done a couple of times every second.The report has two issues, namely:Is it possible to direct the microprocessor to detect and identify a nearby tag after the Mifare standard?What hardware is required for this to be possible?As the research method to provide answers to the above questions an action research was used. This approach has meant that the group worked on information retrieval, examined existing solutions, tested their own solutions and documented the results.The group examined an existing solution that can search for nearby tags with minimal energy consumption. An antenna circuit was built that was connected to the processor.

A key part in the development and verification of digital systems is simulation. But hardware simulators are expensive, and software simulation is not fast enough for designs with a large number of gates. As today?s digital zesigns constantly grow in size (number of gates), and that trend shows no signs to end, faster simulators handling millions of gates are needed. We investigate how to create a software gate-level simulator able to simulate a high number of gates fast.

Målet med examensarbetet är att implementera en mjuk CPU i en FPGA-krets som finns tillgänglig på ett ALTERA DE2 Board. Denna mjuka processor integreras i ett projekt skapat i utvecklingsmiljön Quartus II. Den kommunicera med programmerad logik i FPGA:n och den signalbehandlar en audiosignal (stereo), så att ett eko kan genereras och att volym och balans blir justerbar. Detta styrs av ett tangentbord som kopplas till DE2-kortet och de olika förändringarna på utsignalen visas på en LCD..

Fieldstudys on 22 farms (23 silos) to study relationships between the actual particle size of the maize silage and the theoretical length of cut. The measure of theoretical length of cut were stated by the farmers and not measured by us. Particle size of maize silage was determined using the New Penn State Forage Particle Separator. SLU Skara made a special sieve for us, that had larger holes than de original sieves. The samples were shaken after instructions and then the material was weighted. We have also been taking out samples for microbiological analyses from the silos on 13 of the farms.

Uppgiften var att ta emot och avkoda en radiosignal för tidsangivelse, DCF77. Avkodaren implementerades i en FPGA-krets från ALTERA. Utvecklingen genomfördes i Quartus II-miljön med språket VHDL samt en alternativ lösning där mjuk processor användes. Både utvecklingsmiljön och språken var väl lämpade för uppgiften. Ett genomgående problem var dock radiomottagaren ofta levererade för svag signal för att kunna avkodas korrekt.

This report deals with the modeling of a part of the communication system based on the IEEE 802.11a standard which represents the next generation of wireless LAN with greater scalability, better interference immunity and significantly higher speed, up to 54 Mbps. 802.11a uses Orthogonal Frequency Division Multiplexing (OFDM) where modulation is performed by an IFFT and the demodulation by an FFT. After modeling the FFT in Matlab and C, the FFT implementation has been validated using a soft microprocessor core by Xilinx (Microblaze) and the results were compared..

In this thesis, two real-time stereo methods have been implemented and evaluated. The first one is based on blockmatching and the second one is based on local phase. The goal was to be able to run the algorithms at real-time and examine which one is best. The blockmatching method performed better than the phase based method, both in speed and accuracy. SIMD operations (Single Instruction Multiple Data) have been used in the processor giving a speed boost by a factor of two..